The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2024
Filed:
Jan. 13, 2023
Raytheon Company, Waltham, MA (US);
Paul T. Hartin, McKinney, TX (US);
Ro S. Ko, McKinney, TX (US);
Thomas T. Leise, Collinsville, TX (US);
Edward Escandon, Richardson, TX (US);
RAYTHEON COMPANY, Waltham, MA (US);
Abstract
An electrical signal delay calibration system includes a device under test (DUT) and a digital signal processing chip including a plurality of signal lanes. Each signal lane includes a receive signal path in signal communication with a respective DUT receive path and a transmit signal path in signal communication with a respective DUT transmit path. A processor is configured to determine transmit pulse timestamps assigned to transmit signals transmitted on the transmit signal paths and to determine receive pulse timestamps assigned to receive signals received from the receive signal paths. The processor determines a lane asymmetry associated with each signal lane based on at least one of the transmit pulse timestamps and at least one of the receive pulse timestamps, and removes each of the lane asymmetries to minimize a signal delay in each signal lane among the plurality of signal lanes.