The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Mar. 09, 2021
Applicant:

University of Florida Research Foundation, Incorporated, Gainesville, FL (US);

Inventors:

Mark M. Tehranipoor, Gainesville, FL (US);

Andrew Stern, Gainesville, FL (US);

Shahin Tajik, Gainesville, FL (US);

Farimah Farahmandi, Gainesville, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/78 (2013.01); G01R 31/311 (2006.01); G06F 1/10 (2006.01); G06F 1/28 (2006.01); G06F 21/55 (2013.01);
U.S. Cl.
CPC ...
G06F 21/78 (2013.01); G01R 31/311 (2013.01); G06F 1/10 (2013.01); G06F 1/28 (2013.01); G06F 21/55 (2013.01); G06F 2221/034 (2013.01);
Abstract

A method includes in part, generating an electro-optical frequency map (EOFM) of an active layer of an integrated circuit (IC), retrieving a reference map of the IC, comparing the EOFM of the IC with the reference map to determine whether there is a match between an intensity of an identified region in the EOFM map and an intensity of a corresponding region of the reference map, and detecting one or more hardware trojans in the IC if there is no match. The reference map may be associated with a layout of an IC known not to include hardware trojans. The reference map also may be a second EOFM associated with the IC. Alternatively, the reference map may be generated by applying power to the IC, and applying a clock signal to the IC.


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