The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Apr. 14, 2021
Applicants:

Ordos Yuansheng Optoelectronics Co., Ltd., Inner Mongolia, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Yanyong Song, Beijing, CN;

Yanfeng Li, Beijing, CN;

Haoyi Xin, Beijing, CN;

Xu Qiao, Beijing, CN;

Chenrong Qiao, Beijing, CN;

Wei Ren, Beijing, CN;

Yu Xing, Beijing, CN;

Jingjing Xu, Beijing, CN;

Rula Sha, Beijing, CN;

Guolei Zhi, Beijing, CN;

Guangshuai Wang, Beijing, CN;

Liwen Xin, Beijing, CN;

Jingwei Hou, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1339 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G02F 1/16756 (2019.01);
U.S. Cl.
CPC ...
G02F 1/13394 (2013.01); G02F 1/133351 (2013.01); G02F 1/133514 (2013.01); G02F 1/13396 (2021.01); G02F 1/134309 (2013.01); G02F 1/13458 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G02F 1/16756 (2019.01); G02F 1/13439 (2013.01);
Abstract

An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.


Find Patent Forward Citations

Loading…