The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2024

Filed:

Mar. 17, 2020
Applicants:

Nitto Denko Corporation, Ibaraki, JP;

Spchange, Llc., Yokohama, JP;

Inventors:

Takatsugu Kamata, Yokohama, JP;

Yusaku Hirai, Yokohama, JP;

Masayuki Ueda, Yokohama, JP;

Ryoma Yoshioka, Ibaraki, JP;

Assignees:

NITTO DENKO CORPORATION, Ibaraki, JP;

SPCHANGE, LLC., Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61B 5/304 (2021.01); A61B 5/00 (2006.01); A61B 5/257 (2021.01); A61B 5/28 (2021.01); A61B 5/308 (2021.01); A61B 5/318 (2021.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
A61B 5/304 (2021.01); A61B 5/257 (2021.01); A61B 5/28 (2021.01); A61B 5/308 (2021.01); A61B 5/318 (2021.01); A61B 5/6833 (2013.01); A61B 2560/0209 (2013.01); G06F 13/4282 (2013.01);
Abstract

A data acquisition device includes an integrated circuit and an information processor. The integrated circuit has a first terminal for receiving a master/slave switching signal upon start of data acquisition, an ADC for converting analog input data to digital data, and an output terminal for outputting the digital data. The information processor generates the master/slave switching signal, and has a second terminal connected to the first terminal and for outputting the master/slave switching signal, and an input terminal connected to the output terminal and for receiving the digital data. The information processor operates in the master mode when the integrated circuit operates in the slave mode. The information processor operates in the slave when the integrated circuit operates in the master mode. The integrated circuit outputs the digital data when operating in the master mode according to the master/slave switching signal.


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