The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2024
Filed:
Aug. 30, 2021
Kioxia Corporation, Tokyo, JP;
Natsuki Fukuda, Yokkaichi Mie, JP;
Ryota Narasaki, Yokkaichi Mie, JP;
Takashi Kurusu, Yokkaichi Mie, JP;
Yuta Kamiya, Nagoya Aichi, JP;
Kazuhiro Matsuo, Kuwana Mie, JP;
Shinji Mori, Nagoya Aichi, JP;
Shoji Honda, Kuwana Mie, JP;
Takafumi Ochiai, Kuwana Mie, JP;
Hiroyuki Yamashita, Yokkaichi Mie, JP;
Junichi Kaneyama, Yokkaichi Mie, JP;
Ha Hoang, Kuwana Mie, JP;
Yuta Saito, Yokkaichi Mie, JP;
Kota Takahashi, Yokkaichi Mie, JP;
Tomoki Ishimaru, Yokkaichi Mie, JP;
Kenichiro Toratani, Yokkaichi Mie, JP;
KIOXIA CORPORATION, Tokyo, JP;
Abstract
A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer. At least a portion of the first charge storage layer faces the second charge storage layer without the second high dielectric constant layer being interposed between the portion of the first charge storage layer and the second charge storage layer in the second direction.