The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2024

Filed:

Oct. 28, 2019
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shunpei Yamazaki, Tokyo, JP;

Yukinori Shima, Gunma, JP;

Masataka Nakada, Tochigi, JP;

Takumi Shigenobu, Tochigi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); G02F 1/1368 (2006.01); H01L 29/786 (2006.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H01L 29/4908 (2013.01); H01L 29/42384 (2013.01); H01L 29/66969 (2013.01); G02F 1/13685 (2021.01); H01L 2029/42388 (2013.01); H01L 29/7869 (2013.01); H10K 59/12 (2023.02);
Abstract

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device capable of high-voltage driving is provided. A semiconductor device in which a large amount of current can flow is provided. The semiconductor device has a structure including a semiconductor layer, a first insulating layer, a second insulating layer, a metal oxide layer, a conductive layer, and an insulating region. The metal oxide layer is positioned between the first insulating layer and the conductive layer. The insulating region is adjacent to the metal oxide layer and is positioned between the first insulating layer and the conductive layer. The semiconductor layer includes a first region in contact with the first insulating layer and overlapping with the metal oxide layer and the conductive layer with the first insulating layer therebetween, a second region in contact with the first insulating layer and overlapping with the insulating region and the conductive layer with the first insulating layer therebetween, a third region in contact with the first insulating layer, and a fourth region in contact with the second insulating layer. The insulating region shows a different permittivity from the first insulating layer.


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