The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2024

Filed:

Jan. 04, 2023
Applicant:

Honor Device Co., Ltd., Shenzhen, CN;

Inventors:

Linhong Han, Shenzhen, CN;

Wanming Wu, Shenzhen, CN;

Di Geng, Shenzhen, CN;

Ling Li, Shenzhen, CN;

Zheng Tian, Shenzhen, CN;

Assignee:

HONOR DEVICE CO., LTD., Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G11C 19/28 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0286 (2013.01); G09G 2330/021 (2013.01);
Abstract

This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes a node control module, electrically connected to a first level signal receiving end, a second level signal receiving end, a first node, and a second node; an input module, electrically connected to a first clock signal end, a trigger signal input end, and the second node; an output module, electrically connected to the first level signal receiving end, the second level signal receiving end, the first node, a third node, and a drive signal output end; a first voltage stabilizing module, electrically connected to the first node, a fourth node, and the second level signal receiving end; and a second voltage stabilizing module, electrically connected to the second node, the third node, the fourth node, and a second clock signal end.


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