The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Jan. 24, 2022
Applicant:

Vicor Corporation, Andover, MA (US);

Inventors:

Patrizio Vinciarelli, Boston, MA (US);

Patrick R. Lavery, North Andover, MA (US);

Rudolph F. Mutter, North Andover, MA (US);

Jeffery J. Kirk, Scarborough, ME (US);

Andrew T. D'Amico, Beverly Hills, CA (US);

Assignee:

Vicor Corporation, Andover, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01L 23/053 (2006.01); H01L 23/057 (2006.01); H01L 23/28 (2006.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H05K 3/16 (2006.01); H05K 3/18 (2006.01); H05K 3/20 (2006.01); H05K 3/24 (2006.01); H05K 3/38 (2006.01); H01L 21/44 (2006.01); H01L 23/14 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0204 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H05K 1/186 (2013.01); H05K 3/0014 (2013.01); H05K 3/0026 (2013.01); H05K 3/0044 (2013.01); H05K 3/0079 (2013.01); H05K 3/16 (2013.01); H05K 3/18 (2013.01); H05K 3/207 (2013.01); H05K 3/24 (2013.01); H05K 3/381 (2013.01); H01L 21/44 (2013.01); H01L 23/053 (2013.01); H01L 23/057 (2013.01); H01L 23/147 (2013.01); H01L 23/28 (2013.01); H05K 2201/1003 (2013.01); Y10T 29/49146 (2015.01);
Abstract

Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.


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