The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Jan. 13, 2023
Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:

Yifei Du, San Jose, CA (US);

Zhiqiang Lin, Fremont, CA (US);

Bill Phan, Sunnyvale, CA (US);

Woon Il Choi, Sunnyvale, CA (US);

Assignee:

OMNIVISION TECHNOLOGIES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/59 (2023.01); H01L 27/146 (2006.01); H04N 25/771 (2023.01);
U.S. Cl.
CPC ...
H04N 25/59 (2023.01); H01L 27/14612 (2013.01); H01L 27/14643 (2013.01); H04N 25/771 (2023.01);
Abstract

A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network is coupled between the reset transistor and a bias voltage source. The LOFIC network includes a main LOFIC coupled between the reset transistor and the bias voltage source, and a plurality of subordinate capacitor-switch pairs, each including a subordinate LOFIC and a switch transistor coupled to the subordinate LOFIC. Each of the plurality of subordinate capacitor-switch pairs is coupled between the reset transistor and the bias voltage source.


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