System for time synchronization

Abstract

Maintaining time synchronization between clocks of different devices allows various operations, such as accurate timestamping input data, coordinating presentation of output, and so forth. A pairwise synchronization between a first and second device is provided by opportunistically including timing data within packets transmitted between the devices. A clock sync module in a second device uses a software-implemented phase-locked loop (PLL) with a software-implemented proportional-integral-derivative (PID) controller to synchronize a second clock in the second device to a first clock of the first device. The use of the clock sync module to process the timing data provides clock synchronization without introducing jitter or other undesirable effects at the second device. Using the clock sync module, the timing of the second clock of the second device quickly converges with the first clock. The close convergence facilitates time-sensitive operations, such as synchronizing presentation of content from many participating wireless devices.