The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Aug. 12, 2021
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Miho Akagi, Kanagawa, JP;

Yohtaro Yasu, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/133 (2014.01); G01S 17/894 (2020.01); H03K 5/135 (2006.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0814 (2013.01); G01S 17/894 (2020.01); H03K 5/133 (2013.01); H03K 5/135 (2013.01);
Abstract

A DLL circuit () includes a phase delay circuit (), a selection circuit (), a detection circuit (), and a clock stop circuit (). The phase delay circuit () generates a plurality of delayed signals having different phases according to a clock signal. The selection circuit () selects one of the plurality of delayed signals as an output signal according to a setting signal. The detection circuit () detects a timing of switching the setting signal. The clock stop circuit () stops input of the clock signal to the phase delay circuit () for a predetermined period including the timing detected by the detection circuit ().


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