The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2024

Filed:

Jun. 24, 2021
Applicant:

Sun Yat-sen University, Guangdong, CN;

Inventors:

Yang Liu, Guangdong, CN;

Liang He, Guangdong, CN;

Assignee:

SUN YAT-SEN UNIVERSITY, Guangdong, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 29/401 (2013.01); H01L 29/42316 (2013.01); H01L 29/66462 (2013.01);
Abstract

The present invention relates to an enhancement-mode semiconductor device and a preparation method therefor. The device includes a substrate, a semiconductor epitaxial layer, a gate electrode, a source electrode, and a drain electrode. The epitaxial layer includes a nitride nucleation layer, a nitride stress buffer layer, a nitride channel layer, a primary epitaxial nitride barrier layer, a p-type nitride layer and a secondary epitaxial nitride barrier layer. By means of etching, the p-type nitride in a gate electrode region is reserved, realizing the depletion of a gate electrode channel. By means of maskless regrowth, the secondary epitaxial nitride barrier layer is grown on the primary epitaxial barrier layer and the p-type nitride layer in the gate electrode region, realizing a high-conduction access region.


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