The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
May. 08, 2023
Celera, Inc., San Jose, CA (US);
Celera, Inc., San Jose, CA (US);
Abstract
In some embodiments, information specifying a transistor to be generated is received, the information comprising an on resistance. A total width of a gate of the transistor to be generated is determined based at least on the on resistance. A first width, a number of fingers (F), and a number of device cells (P) are determined based on the total width. A transistor level schematic is generated comprising one or more transistors configured with the first width and the number of fingers (F). A layout is generated, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F) each gate having said first width, wherein the device cells are configured in a two-dimensional array.