Temperature-based bandwidth compensation for memory traffic

Abstract

Techniques are disclosed relating to bandwidth compensation for certain memory traffic at high temperatures. In some embodiments, processor circuitry is configured to execute memory access operations for multiple traffic classes, including a first traffic class (e.g., real-time traffic) associated with a bandwidth quality-of-service parameter and a second traffic class (e.g., low-latency traffic). In some embodiments, memory controller circuitry is configured to access storage circuitry to perform the memory access operations, determine a temperature value associated with the storage circuitry, and, based on detection of a first temperature scenario for the storage circuitry, allocate memory access operations among the first and second traffic class according to a first allocation policy. In some embodiments, in response to detection of a second temperature scenario for the storage circuitry, memory controller circuitry allocates memory access operations among both traffic classes according to a second allocation policy. The second allocation policy may provide greater bandwidth for the first class than the first allocation policy.