The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
Feb. 16, 2021
Fanuc Corporation, Yamanashi, JP;
Kei Hagihara, Yamanashi, JP;
Tomomasa Nakama, Yamanashi, JP;
Fanuc Corporation, Yamanashi, JP;
Abstract
The present invention provides a SerDes interface circuit and a control device which make it possible to use the same SerDes to perform data transfer of different communication rates. The present invention includes: a FIFO that inputs a first clock of a first frequency, first transmission data based on the first clock, and a second clock of a second frequency which is different from the first frequency, and that outputs the first transmission data on the basis of the second clock in the order of input; a flipflop that fetches and holds the FIFO output on the basis of the second clock; and an output state machine operating with the second clock that inputs the FIFO output and the flipflop output, and generates parallel data in which the same data corresponding to the first transmission data is consecutive.