The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
Sep. 24, 2021
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Hee Jun Park, San Diego, CA (US);
Bohuslav Rychlik, San Diego, CA (US);
Niraj Shantilal Paliwal, Nasik, IN;
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); G06F 7/544 (2006.01); G06F 9/50 (2006.01); G06F 11/07 (2006.01); G06N 3/048 (2023.01);
U.S. Cl.
CPC ...
G06F 11/302 (2013.01); G06F 7/5443 (2013.01); G06F 9/5066 (2013.01); G06F 11/0772 (2013.01); G06N 3/048 (2023.01);
Abstract
Certain aspects of the present disclosure provide techniques for improved hardware utilization. An input data tensor is divided into a first plurality of sub-tensors, and a plurality of logical sub-arrays in a physical multiply-and-accumulate (MAC) array is identified. For each respective sub-tensor of the first plurality of sub-tensors, the respective sub-tensor is mapped to a respective logical sub-array of the plurality of logical sub-arrays, and the respective sub-tensor is processed using the respective logical sub-array.