The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Feb. 23, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Lu Wang, Chapel Hill, NC (US);

Yu Song, San Diego, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/06 (2006.01); H03K 5/01 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/01 (2013.01); G06F 1/06 (2013.01); H03K 2005/00019 (2013.01); H03K 2005/00286 (2013.01);
Abstract

A clock generation apparatus has a delay circuit, a phase selection circuit, and a phase measurement circuit. The delay circuit outputs a first signal that is a delayed version of an input signal. The phase selection circuit receives the input signal and one or more phase-shifted versions of the input signal and outputs a second signal that is a phase-shifted version of the input signal. The phase measurement circuit compares the phases of the first signal and the second signal and provides a first output that controls phase of the second signal relative to the input signal. The phase measurement circuit also provides a second output that controls a delay applied by the delay circuit to the input signal to generate the first signal.


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