The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Dec. 17, 2021
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Ramon A. Mangaser, Boxborough, MA (US);

Srikanth Reddy Gruddanti, Bangalore, IN;

Prasant Kumar Vallur, Bangalore, IN;

Krishna Reddy Mudimela Venkata, Bangalore, IN;

Oikwan Tsang, Santa Clara, CA (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/20 (2006.01); G06F 1/06 (2006.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
H03K 19/20 (2013.01); G06F 1/06 (2013.01); H03K 3/037 (2013.01);
Abstract

A clock circuit for clock gating using a cascaded clock gating control signal, including: a first B-latch accepting, as input, a clock gating control signal and enabled by a first clock signal; a second B-latch accepting, as input, an output from the first B-latch and enabled by a second clock signal; and a first logic outputting, based on the first B-latch, a first gated clock signal; and a second logic outputting, based on the second B-latch, a second gated clock signal.


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