The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2024

Filed:

Apr. 12, 2024
Applicant:

Southeast University, Jiangsu, CN;

Inventors:

Huafeng Xiao, Jiangsu, CN;

Xiaobiao Wang, Jiangsu, CN;

Assignee:

SOUTHEAST UNIVERSITY, Nanjing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/487 (2007.01); H02M 1/00 (2006.01); H02M 1/088 (2006.01); H02M 7/5387 (2007.01);
U.S. Cl.
CPC ...
H02M 7/487 (2013.01); H02M 1/0054 (2021.05); H02M 1/088 (2013.01); H02M 7/5387 (2013.01);
Abstract

Disclosed are a modulation strategy suitable for balancing losses of power switches in a bridge arm of a neutral point clamped three level inverter and an implementation method. The modulation strategy includes that an operation type of an inverter is determined and a corresponding modulation style is selected on the basis of a power factor (PF) angle; a corresponding modulation interval is selected according to the modulation style; and drive signals for various power switches are outputted, to balance switching losses of inner and outer sides of a bridge arm. The modulation strategy of the present disclosure enables the rational utilization of freewheeling paths to achieve a balanced distribution of losses between the inner and outer power switches of the inverter bridge within the entire PF range, thereby prolonging the service life of power electronic devices.


Find Patent Forward Citations

Xiao, Huafeng. (2024). Modulation strategy suitable for balancing losses of power switches in bridge arm of neutral point clamped three level inverter and implementation method (U.S. Patent No. 12088215). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12088215

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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