Parallel access to volatile memory by a processing device for machine learning

Abstract

A memory system having a processing device (e.g., CPU) and memory regions (e.g., in a DRAM device) on the same chip or die. The memory regions store data used by the processing device during machine learning processing (e.g., using a neural network). One or more controllers are coupled to the memory regions and configured to: read data from a first memory region (e.g., a first bank), including reading first data from the first memory region, where the first data is for use by the processing device in processing associated with machine learning; and write data to a second memory region (e.g., a second bank), including writing second data to the second memory region. The reading of the first data and writing of the second data are performed in parallel.