The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2024

Filed:

May. 15, 2020
Applicants:

Andrew Ward Beale, Irvine, CA (US);

David Strong, Irvine, CA (US);

Inventors:

Andrew Ward Beale, Irvine, CA (US);

David Strong, Irvine, CA (US);

Assignee:

Unisys Corporation, Blue Bell, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 12/06 (2006.01);
U.S. Cl.
CPC ...
G06F 9/45558 (2013.01); G06F 12/06 (2013.01); G06F 2009/45583 (2013.01); G06F 2212/7201 (2013.01);
Abstract

A system and method for the dynamic, run-time configuration of logic core register files, and the provision of an associated execution context. The dynamic register files as well as the associated execution context information are software-defined so as to be virtually configured in random-access memory. This virtualization of both the processor execution context and register files enables the size, structure and performance to be specified at run-time and tailored to the specific processing, instructions and data associated with a given processor state or thread, thereby minimizing both the aggregate memory required and the context switching time. In addition, the disclosed system and method provides for processor virtualization which further enhances the flexibility and efficiency.


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