The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2024

Filed:

Jun. 02, 2023
Applicant:

Hewlett Packard Enterprise Development Lp, Spring, TX (US);

Inventor:

Sanyam Mehta, Bloomington, MN (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3814 (2013.01); G06F 9/30047 (2013.01); G06F 9/30065 (2013.01); G06F 9/321 (2013.01); G06F 9/38 (2013.01); G06F 9/3802 (2013.01); G06F 9/5016 (2013.01);
Abstract

One aspect provides a system for hardware-assisted pre-execution. During operation, the system determines a pre-execution code region comprising one or more instructions. The system increments a global counter upon initiating the one or more instructions. The system issues a first instruction, which involves setting, in a first entry for the first instruction in a data structure, a first prefetch region identifier with a current value of the global counter. Responsive to a head pointer of the data structure reaching the first entry, the system: determines, based on a non-zero value for the first prefetch region identifier, that the first entry is not available to be allocated; and advances the head pointer to a next entry in the data structure, which renders a load associated with the first entry as a non-blocking load. The system resets the global counter upon completing the one or more instructions.


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