The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2024

Filed:

Oct. 28, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jehyun Park, Suwon-si, KR;

Kwanho Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/0653 (2013.01); G06F 3/0673 (2013.01); G06F 11/0751 (2013.01); G06F 11/0772 (2013.01); G06F 11/1048 (2013.01); G11C 29/42 (2013.01);
Abstract

A memory system includes a semiconductor memory device and a memory controller configured to control the semiconductor memory device. The semiconductor memory device includes a memory cell array including a plurality of memory cells configured to store data, a refresh controller configured to control a refresh operation with respect to the plurality of memory cells, and an error monitoring circuit configured to generate error information by monitoring an error in the data stored in the memory cell array based on refresh sensing data provided from the memory cell array during the refresh operation. The memory controller includes an error correction code (ECC) circuit and is further configured to correct the error in the data stored in the memory cell array using the ECC circuit based on the error information.


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