The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Dec. 09, 2020
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Yuqian Pang, Beijing, CN;

Miao Wang, Beijing, CN;

Yunsheng Xiao, Beijing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10K 59/131 (2023.01); H10K 50/844 (2023.01); H10K 59/122 (2023.01); H10K 59/124 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01);
U.S. Cl.
CPC ...
H10K 59/1315 (2023.02); H10K 50/844 (2023.02); H10K 59/122 (2023.02); H10K 59/124 (2023.02); H10K 77/111 (2023.02); H10K 2102/311 (2023.02);
Abstract

The present disclosure relates to a display substrate, including: a substrate including a display region and a peripheral region surrounding the display region, the peripheral region including a first wiring region, the first wiring region including a first sub-wiring region disposed along a first direction away from the display region; a first conductive layer located on the substrate; a first dielectric layer located on the first conductive layer; a second conductive layer located on the first dielectric layer; a second dielectric layer located on the second conductive layer; a third conductive layer located on the second dielectric layer; a third dielectric layer as a planarization layer located on the third conductive layer; a fourth conductive layer located on the third dielectric layer. The fourth wiring is electrically connected to the third wiring. An orthographic projection of the fourth wiring on the substrate at least partially overlaps with an orthographic projection of the third wiring on the substrate.


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