The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

May. 15, 2023
Applicant:

SK Hynix Inc., Icheon, KR;

Inventor:

Si Jung Yoo, Seoul, KR;

Assignee:

SK hynix Inc., Icheon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 63/00 (2023.01); G11C 5/02 (2006.01); G11C 13/00 (2006.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10B 63/00 (2023.02); G11C 5/025 (2013.01); G11C 13/0002 (2013.01); G11C 13/0004 (2013.01); H10N 70/231 (2023.02); H10N 70/826 (2023.02); H10N 70/8828 (2023.02);
Abstract

A semiconductor memory includes first variable resistance layers and insulating layers alternately stacked; conductive pillars passing through the first variable resistance layers and the insulating layers; a slit insulating layer vertically passing through the insulating layers, extending in a first direction, and being disposed in a second direction of the insulating layers, the second direction intersecting with the first direction; conductive layers disposed between the slit insulating layer and the first variable resistance layers; and electrode layers disposed between the conductive layers and the first variable resistance layers. The first variable resistance layers remain in an amorphous state during a program operation.


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