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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12075624 B1

PDFFull Text
Date of Patent:
Aug. 27, 2024

Filed:

Jul. 16, 2021

Three-dimensional semiconductor memory device

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Seokcheon Baek, Hwaseong-si, KR;

Younghwan Son, Hwaseong-si, KR;

Miram Kwon, Suwon-si, KR;

Junyong Park, Hwaseong-si, KR;

Jiho Lee, Suwon-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;

Attorney:

Sughrue Mion, PLLC

Primary Examiner:

Kyoung Lee

Assistant Examiner:

Sophia W Kao

Int. Cl.
CPC ...
H10B 43/35 (2023.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02);
Abstract

Provided is a three-dimensional semiconductor memory device including a first substrate that includes a cell array region and a connection region; first and second electrode layers that are sequentially stacked and spaced apart from each other on the first substrate, and an end portion of the first electrode layer and an end portion of the second electrode layer are offset from each other on the connection region; a first cell contact penetrating the second electrode layer and the first electrode layer such as to be connected to the second electrode layer on the connection region; and a first contact dielectric pattern between the first cell contact and the first electrode layer. The first cell contact includes columnar part that vertically extends from a top surface of the first substrate, and a connection part that laterally protrudes from the columnar part and contacts the second electrode layer.

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