The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Aug. 17, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Tongsung Kim, Suwon-si, KR;

Youngmin Jo, Hwaseong-si, KR;

Manjae Yang, Hwaseong-si, KR;

Chiweon Yoon, Seoul, KR;

Junha Lee, Seoul, KR;

Byunghoon Jeong, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 29/02 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G06F 1/04 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 29/023 (2013.01); G11C 29/028 (2013.01); G11C 5/145 (2013.01);
Abstract

A storage device includes a plurality of memory chips and a chip. The plurality of memory chips includes a first memory chip configured to generate a first signal based on a first clock signal, and a second memory chip configured to generate a second signal based on a second clock signal. The chip is configured to receive the first and second signals and generate and output a first and second comparison signal based on a duty cycle of the first and second signals. The first memory chip is further configured to generate a first corrected signal by adjusting a duty cycle of the first clock signal based on the first comparison signal, and the second memory chip is further configured to generate a second corrected signal by adjusting a duty cycle of the second clock signal based on the second comparison signal.


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