The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2024

Filed:

Oct. 16, 2019
Applicant:

Mbda France, Le Plessis-Robinson, FR;

Inventors:

Eric Cadalen, Le Plessis-Robinson, FR;

Mikaël Saturnin, Le Plessis-Robinson, FR;

Assignee:

MBDA FRANCE, Le Plessis-Robinson, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B23K 1/00 (2006.01); H05K 3/34 (2006.01); B23K 101/42 (2006.01); B23K 103/08 (2006.01);
U.S. Cl.
CPC ...
B23K 1/0016 (2013.01); H05K 3/34 (2013.01); B23K 2101/42 (2018.08); B23K 2103/08 (2018.08);
Abstract

The connection method between at least two elements (E, E) corresponding to a printed circuit () and to an electronic component (), comprises a step of forming a plurality of pad-type stacks () of bosses (), the stacks () of bosses () being formed on a face () of a first (E) of the elements (E, E), the stacks () of bosses () each comprising the same given number of bosses (), said method also comprising a step of depositing a brazing product () on this first element (E) provided with stacks () of bosses (), a step of arranging the second (E) of the elements (E, E) on the first element (E), and a step of remelting the assembly thus formed, in order to obtain an electronic device (). This method makes it possible to produce a precise and flexible raising of surface mounted electronic components.


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