The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Aug. 08, 2023
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Takahiko Iizuka, Yokohama Kanagawa, JP;

Daisaburo Takashima, Yokohama Kanagawa, JP;

Ryu Ogiwara, Yokohama Kanagawa, JP;

Rieko Funatsuki, Yokohama Kanagawa, JP;

Yoshiki Kamata, Tokyo, JP;

Misako Morota, Tokyo, JP;

Yoshiaki Asao, Kawasaki Kanagawa, JP;

Yukihiro Nomura, Tokyo, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10B 63/845 (2023.02); G11C 13/0004 (2013.01); G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); H10B 63/34 (2023.02); H10N 70/066 (2023.02); H10N 70/231 (2023.02); H10N 70/8828 (2023.02); G11C 2213/75 (2013.01);
Abstract

A memory device includes: a first interconnect; a second interconnect; a first string and a second string whose first ends are coupled to the first interconnect; a third string and a fourth string whose second ends are coupled to the second interconnect; a third interconnect; and driver. The third interconnect is coupled to second ends of the first and second strings and to first ends of the third and fourth strings. Each of the first, second, third, and fourth strings includes a first switch element and a memory cell coupled in series. The memory cell includes a second switch element and a resistance change element coupled in parallel. The third interconnect is coupled to the driver via the first interconnect or the second interconnect.


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