The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Nov. 09, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hwanwoong Kim, Suwon-si, KR;

Jihun Kim, Suwon-si, KR;

Jung Bin Yun, Suwon-si, KR;

Seungjoon Lee, Suwon-si, KR;

Hongsuk Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/75 (2023.01); H01L 27/146 (2006.01); H04N 25/77 (2023.01);
U.S. Cl.
CPC ...
H04N 25/77 (2023.01); H01L 27/1463 (2013.01); H04N 25/75 (2023.01);
Abstract

A pixel array including pixels arranged in a matrix shape is provided. The pixels have a same structure and are separated from each other by front deep trench isolation (FDTI). A first pixel among the pixels includes a first floating diffusion region, a first group of photoelectric conversion elements, a first group of charge transfer transistors, a first source follower transistor, and a first transistor, a second transistor, and a first reset transistor connected in series between the first floating diffusion region and a voltage supply line. One of the first transistor, the second transistor, and the first reset transistor is formed in a first sub-pixel region. At least another one of the first transistor, the second transistor, and the first reset transistor is formed in a second sub-pixel region. The first sub-pixel region and the second sub-pixel region are separated from each other by the FDTI.


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