The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2024

Filed:

Sep. 03, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Ryota Suzuki, Yokkaichi Mie, JP;

Ken Komiya, Nagoya Aichi, JP;

Katsuyuki Kitamoto, Yokkaichi Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/768 (2006.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/76831 (2013.01); H01L 21/76877 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02); H01L 2221/1063 (2013.01);
Abstract

A semiconductor storage device includes a first wiring layer, a first insulating layer on the first wiring layer, a second wiring layer on the first insulating layer, a second insulating layer on the second wiring layer, a third wiring layer on the second insulating layer, and a first pillar that passes through the first, second, and third wiring layers and the first and second insulating layers along a first direction and includes a first semiconductor layer. A first distance between side surfaces of the first wiring layer and the first insulating layer facing the first pillar is greater than a second distance between side surfaces of the second wiring layer and the second insulating layer facing the first pillar and a third distance between the side surfaces of the second insulating layer and the third wiring layer facing the first pillar.


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