The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2024
Filed:
Dec. 08, 2020
Hefei Xinsheng Optoelectronics Technology Co., Ltd., Hefei, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Qin Zeng, Beijing, CN;
Zouming Xu, Beijing, CN;
Chunjian Liu, Beijing, CN;
Jian Tian, Beijing, CN;
Xintao Wu, Beijing, CN;
Jie Lei, Beijing, CN;
Jie Wang, Beijing, CN;
Xiaodong Xie, Beijing, CN;
Min He, Beijing, CN;
Xinxiu Zhang, Beijing, CN;
Xue Zhao, Beijing, CN;
Huayu Sang, Beijing, CN;
Wenjie Xu, Beijing, CN;
Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Abstract
An array substrate includes connecting leads, a signal channel region extending in a first direction, a first power voltage lead, and a second power voltage lead. Any one of the signal channel region includes at least two control region columns extending in the first direction, and any one of the control region columns includes a plurality of control regions arranged along the first direction. Any one of the control regions includes a pad connecting circuit and a first pad group for bonding a microchip, the first pad group is electrically connected to the first power voltage lead. The pad connection circuit includes a plurality of second pad groups, and is provided with a first end electrically connected to the first pad group, and a second end electrically connected to the second power voltage lead.