Nonvolatile memory device with configuration to apply adjustable voltage to pass transistor gate

Abstract

A nonvolatile memory device includes a memory block and a control circuit. The memory block includes a plurality of cell strings where each of the plurality of cell strings includes a string selection transistor, a plurality of memory cells and a ground selection transistor which are connected in series and disposed in a vertical direction between a bit-line and a common source line. The control circuit adjusts a level of a high voltage applied to a gate of a pass transistor of a selected word-line such that a voltage difference between the high voltage and a program voltage applied to a drain of the pass transistor differs in at least a portion of a plurality of program loops based on a comparison of a number of the program loops and a reference number during a program operation on a target memory cells.