The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2024

Filed:

Apr. 06, 2023
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Jie Won Ryu, Santa Clara, CA (US);

Kingsuk Brahma, Mountain View, CA (US);

Qing Li, Cupertino, CA (US);

Shawn P Hurley, Sunnyvale, CA (US);

Ce Zhang, Cupertino, CA (US);

Warren S Rieutort-Louis, Cupertino, CA (US);

Feng Wen, Santa Clara, CA (US);

Marc J DeVincentis, Palo Alto, CA (US);

Zhe Hua, San Jose, CA (US);

Hyunwoo Nho, Palo Alto, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01); G09G 2340/0435 (2013.01);
Abstract

This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.


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