The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2024
Filed:
Jan. 25, 2024
Applicant:
Parry Labs, Llc, Alexandria, VA (US);
Inventors:
Marc Couture, Alexandria, VA (US);
Michael Palmer, Alexandria, VA (US);
Assignee:
Parry Labs, LLC, Alexandria, VA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/20 (2006.01); G06T 1/60 (2006.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06T 1/60 (2013.01);
Abstract
A system on a chip may include a GPU, a CPU, a dedicated memory for the CPU, an FPGA, a dedicated memory for the FPGA, a control and data bus assembly connecting the FPGA, the CPU, and the GPU, wherein the FPGA, the CPU, and the GPU are configured to interact using the control and data bus assembly and an API configured to allow the same code to run on the FPGA, the CPU, and the GPU, a VPX, a first HSIO connection connecting the GPU to the VPX, a second HSIO connection connecting the CPU to the VPX, and a third HSIO connection connecting the FPGA to the VPX.