The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2024
Filed:
Mar. 15, 2019
Suzhou Lekin Semiconductor Co., Ltd., Taicang, CN;
SUZHOU LEKIN SEMICONDUCTOR CO., LTD., Taicang, CN;
Abstract
Disclosed in an embodiment are a semiconductor device and a light-emitting device package including same, the semiconductor device comprising: a substrate; a plurality of semiconductor structures arranged in a matrix shape in the central area of the substrate; passivation layers arranged on upper surfaces and lateral surfaces of the semiconductor structures and on the edge area of the substrate; a plurality of first wiring lines which are arranged at lower parts of the plurality of semiconductor structures and electrically connected thereto, and which include first end parts extending from the central area to the edge area of the substrate; a plurality of second wiring lines which are arranged at the lower parts of the plurality of semiconductor structures and electrically connected thereto, and which include second end parts extending from the central area to the edge area of the substrate; a plurality of first pads penetrating the passivation layer so as to be connected to the plurality of first end parts; and a plurality of second pads penetrating the passivation layers so as to be connected to the plurality of second end parts, wherein the plurality of semiconductor structures include a plurality of first semiconductor structures, which are arranged in a first area of the central area, and a plurality of second semiconductor structures, which are arranged in a second area of the central area, and the size of the plurality of first semiconductor structures differs from the size of the plurality of second semiconductor structures.