The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Jan. 10, 2020
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventor:

Takumi Kanda, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/367 (2013.01); H01L 23/49838 (2013.01); H01L 23/49861 (2013.01); H01L 25/072 (2013.01); H01L 23/3121 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73265 (2013.01);
Abstract

A semiconductor device includes an insulating substrate, wiring layers, heat dissipation layers, a semiconductor element, and a sealing resin. The wiring layers each have a first obverse face and a first reverse face oriented in opposite directions in a thickness direction of the substrate. The first reverse faces of the wiring layers are connected to the substrate. The heat dissipation layers each have a second obverse face oriented in the same direction as the first obverse face, and a second reverse face oriented opposite to the second obverse face in the thickness direction. The heat dissipation layers are located opposite to the plurality of wiring layers in the thickness direction with respect to the substrate. The second obverse faces of the heat dissipation layers are connected to the substrate. The semiconductor element is connected to one of the first obverse faces of the wiring layers. The sealing resin covers the substrate, the wiring layers, and the semiconductor element. As viewed in the thickness direction, the wiring layers overlap with the heat dissipation layers, respectively.


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