The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Jul. 12, 2022
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Dario Melchionni, Agrate Brianza, IT;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1009 (2013.01); G11C 7/1069 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01);
Abstract

A mask read only memory device is provided. Single-transistor memory cells are arranged in rows and columns. Each word line is associated with a corresponding row. Each bit line is associated with a corresponding column. Each first reference line selectively provides a first potential in a first phase and a second potential in a second phase. Each second reference line selectively provides the second potential in the first read phase and the first potential in the second phase. Each memory cell has a gate coupled to a word line, a drain coupled to a bit line and a source terminal either floating, grounded or coupled to one among a first reference line and a second reference line. One of first to fourth logic values is read during a read operation of the memory cell.


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