Processing system, related integrated circuit, system and method

Abstract

A UART communication interface manages transmission/reception at a baud rate using a baud-rate detection circuit. An edge detector detects edges in a reception signal and resets a count value in a digital counter circuit indicating a time between two consecutive edges. In the absence of a detected edge, the digital counter circuit increases the count value. At a newly detected edge, a validation circuit verifies the count value by asserting a second control signal when the count value is smaller than a maximum, and otherwise de-asserting the second control signal. A register provides a threshold signal by storing the count value when the second control signal is asserted. The threshold signal stored by the register is updated when the time is in a permitted range corresponding to the duration of a single bit. The baud rate may be determined as a function of the threshold signal.