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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12055821 B1

PDFFull Text
Date of Patent:
Aug. 06, 2024

Filed:

Nov. 20, 2020

Structure and method of bi-layer pixel isolation in advanced lcos back-plane

Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Lan Yu, Albany, NY (US);

Benjamin D. Briggs, Clifton Park, NY (US);

Tyler Sherwood, Fonda, NY (US);

Zihao Yang, Santa Clara, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:

Kilpatrick Townsend & Stockton LLP

Primary Examiner:

Yu-Hsi D Sun

Int. Cl.
CPC ...
H01L 21/66 (2006.01); G02F 1/1339 (2006.01); H01L 21/67 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 29/423 (2006.01); H01L 31/20 (2006.01); H01L 33/46 (2010.01); H10K 59/50 (2023.01); H10N 10/855 (2023.01); G02F 1/1335 (2006.01); G02F 1/1362 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13394 (2013.01); H01L 21/67207 (2013.01); H01L 21/67225 (2013.01); H01L 22/26 (2013.01); H01L 23/5226 (2013.01); H01L 23/53219 (2013.01); H01L 23/53276 (2013.01); H01L 29/42368 (2013.01); H01L 31/206 (2013.01); H01L 33/46 (2013.01); H01L 33/465 (2013.01); H10K 59/50 (2023.02); H10N 10/855 (2023.02); G02F 1/133553 (2013.01); G02F 1/136227 (2013.01); G02F 1/136277 (2013.01); H01L 21/31122 (2013.01); H01L 2224/05181 (2013.01); H01L 2224/05184 (2013.01);
Abstract

Processing methods may be performed to form a pixel isolation structure on a semiconductor substrate. The method may include forming a pixel isolation bilayer on the semiconductor substrate. The pixel isolation bilayer may include a high-k layer overlying a stopping layer. The method may include forming a lithographic mask on a first region of the pixel isolation bilayer. The method may also include etching the pixel isolation bilayer external to the first region. The etching may reveal the semiconductor substrate. The etching may form the pixel isolation structure.

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