The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2024

Filed:

Oct. 06, 2022
Applicant:

Psiquantum, Corp., Palo Alto, CA (US);

Inventor:

Eric Dudley, Sacramento, CA (US);

Assignee:

PSIQUANTUM, CORP., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G01J 1/02 (2006.01); G01J 1/44 (2006.01); G02B 6/136 (2006.01); G06N 10/00 (2022.01);
U.S. Cl.
CPC ...
G02B 6/12004 (2013.01); G01J 1/0204 (2013.01); G01J 1/44 (2013.01); G02B 6/136 (2013.01); G06N 10/00 (2019.01); G01J 2001/442 (2013.01); G02B 2006/12135 (2013.01); G02B 2006/12138 (2013.01);
Abstract

A method includes fabricating a device including a first dielectric layer, an optical waveguide in the first dielectric layer, and a superconducting circuit in the first dielectric layer and on the optical waveguide. The method also includes forming a sacrificial structure on the first dielectric layer, the sacrificial structure aligned with the superconducting circuit, depositing a second dielectric layer on the sacrificial structure, and cutting an opening in the second dielectric layer to expose the sacrificial structure. The method further includes wet etching the sacrificial structure through the opening and sealing the opening in the second dielectric layer with a third dielectric layer to form a micro-channel between the first dielectric layer and the second dielectric layer.


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