The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2024

Filed:

Aug. 24, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yoshihiro Ueda, Yokohama Kanagawa, JP;

Naoharu Shimomura, Meguro Tokyo, JP;

Tsuyoshi Kondo, Kawasaki Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 61/00 (2023.01); G11C 11/16 (2006.01); H10N 50/10 (2023.01); H10N 50/80 (2023.01);
U.S. Cl.
CPC ...
H10B 61/22 (2023.02); G11C 11/161 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H10N 50/10 (2023.02); H10N 50/80 (2023.02);
Abstract

A magnetic memory includes a planar electrode and a first wiring spaced from the electrode. A first magnetic member is between the electrode and the first wiring. The first magnetic member has a first end facing the first wiring and a second end facing the electrode. A magnetoresistive element is connected to the first end. A transistor is between the magnetoresistive element and the first wiring. The transistor has a channel layer and a gate electrode covering at least part of an outer periphery of the channel layer. One end of the channel layer is connected to the magnetoresistive element, and another end of the channel layer is connected to the first wiring. A second wiring has a portion between the electrode and the second end of the first magnetic member. A control circuit is electrically connected to the gate electrode, the electrode, and the first and second wirings.


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