The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2024

Filed:

Sep. 03, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Mutsumi Okajima, Yokkaichi Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/02 (2006.01); H01L 29/24 (2006.01);
U.S. Cl.
CPC ...
H10B 12/30 (2023.02); H01L 21/02565 (2013.01); H01L 29/24 (2013.01); H10B 12/03 (2023.02); H10B 12/05 (2023.02);
Abstract

A semiconductor memory device includes a plurality of memory portions arranged in a first direction, a plurality of semiconductor layers arranged in the first direction and electrically connected to the plurality of memory portions respectively, a plurality of gate electrodes arranged in the first direction and opposed to the plurality of semiconductor layers respectively, a gate insulating film disposed between the plurality of semiconductor layers and the plurality of gate electrodes, a first wiring extending in the first direction and connected to the plurality of gate electrodes, and a plurality of second wirings arranged in the first direction and connected to the plurality of semiconductor layers respectively. The plurality of semiconductor layers are opposed to surfaces on one side and the other side of each of the plurality of gate electrodes in the first direction via the gate insulating film.


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