The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2024

Filed:

Jul. 25, 2022
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Guan Huei See, Singapore, SG;

Ramesh Chidambaram, Singapore, SG;

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 21/768 (2006.01); H01L 23/13 (2006.01); H01L 23/14 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01); H01L 27/06 (2006.01); H01Q 1/22 (2006.01); H01Q 1/24 (2006.01); H05K 1/02 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/486 (2013.01); H01L 21/4864 (2013.01); H01L 21/50 (2013.01); H01L 21/76802 (2013.01); H01L 23/13 (2013.01); H01L 23/147 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49866 (2013.01); H01L 23/49894 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 27/0688 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/243 (2013.01); H05K 1/0243 (2013.01); H01L 2021/60007 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/107 (2013.01);
Abstract

The present disclosure relates to methods and apparatus for forming thin-form-factor reconstituted substrates and semiconductor device packages for radio frequency applications. The substrate and package structures described herein may be utilized in high-density 2D and 3D integrated devices for 4G, 5G, 6G, and other wireless network systems. In one embodiment, a silicon substrate is structured by laser ablation to include cavities for placement of semiconductor dies and vias for deposition of conductive interconnections. Additionally, one or more cavities are structured to be filled or occupied with a flowable dielectric material. Integration of one or more radio frequency components adjacent the dielectric-filled cavities enables improved performance of the radio frequency elements with reduced signal loss caused by the silicon substrate.


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