The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2024
Filed:
Dec. 26, 2019
Applicant:
SK Hynix Nand Product Solutions Corp., San Jose, CA (US);
Inventors:
Justin R. Dayacap, Daly City, CA (US);
Shantanu R. Rajwade, Santa Clara, CA (US);
Kyung Jean Yoon, Santa Clara, CA (US);
Ali Khakifirooz, Los Altos, CA (US);
David J. Pelster, Longmont, CO (US);
Yogesh B. Wakchaure, Folsom, CA (US);
Xin Guo, San Jose, CA (US);
Assignee:
SK hynix NAND Product Solutions Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 16/16 (2006.01); G11C 16/32 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3445 (2013.01); G11C 16/16 (2013.01); G11C 16/32 (2013.01); G11C 2216/20 (2013.01);
Abstract
An apparatus is described. The apparatus includes a memory chip having logic circuitry to suspend application of an erasure voltage, wherein, respective responses of the erasure voltage to a decision to suspend the application of the erasure voltage depend on where the erasure voltage is along its waveform.