The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Dec. 22, 2022
Applicant:

Marvell Asia Pte Ltd, Singapore, SG;

Inventors:

Luca Vercesi, Pavia, IT;

Fernando De Bernardinis, Pavia, IT;

Assignee:

Marvell Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/033 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0331 (2013.01); H04L 7/0016 (2013.01);
Abstract

A method for recovering a clock from input data, in a deserializer that couples a transmission medium to receive circuitry of a data transceiver, includes operating, in a first clock recovery loop, on equalized input data from a data recovery loop to provide a first timing error signal, operating, in a second clock recovery loop, on unequalized input data to provide a second timing error signal, combining the first and second timing error signals, and deriving a recovered clock signal from the combined first and second timing error signals using an oscillator circuit. Combining the first and second timing error signals may include operating on the first and second timing error signals in a manner that filters the first timing error signal to remove low-frequency components including adaptation errors introduced by the data recovery loop, and that filters the second timing error signal to remove high frequency components including jitter.


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