The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2024
Filed:
Aug. 10, 2022
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
Arashk Norouzpourshirazi, Austin, TX (US);
Stephen T. Hodapp, Austin, TX (US);
Ravi K. Kummaraguntla, Austin, TX (US);
Paul Wilson, Linlithgow, GB;
Axel Thomsen, Austin, TX (US);
Assignee:
Cirrus Logic Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01); G11C 27/02 (2006.01); H02M 3/07 (2006.01); H03K 17/06 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 3/496 (2013.01); G11C 27/024 (2013.01); H02M 3/07 (2013.01); H03K 17/063 (2013.01); H03M 1/1245 (2013.01); H02M 3/076 (2021.05);
Abstract
A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.