High-accuracy adaptive digital frequency synthesizer for wireless power systems

Abstract

A high-resolution adaptive digital frequency synthesizer Integrated Circuit (IC) for wireless power systems, which comprises a digitally controlled tunable ring-oscillator, based on a chain of delay-line cells (DLs) being adapted to generate an internal high-resolution reference clock signal; a tuner unit for receiving as input a compensation/target signal and performing arithmetic operations that produce auxiliary tuning signals provided to the ring-oscillator, for allowing the ring-oscillator to generate a high-resolution output period/frequency; a counter-comparator unit introducing an additional delay to the chain, the counter-comparator unit operating in combination with the ring-oscillator and counts how many times the delay of the chain repeats, for providing ultra-fine tuning signal for tuning the frequency resolution of digitally controlled ring-oscillator; an adaptive Fractional-N dithering module, for enhancing the frequency resolution of the digitally controlled ring-oscillator by averaging the resolution provided by a single delay-line cell of the ring-oscillator.