The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2024

Filed:

Apr. 21, 2024
Applicant:

Southeast University, Nanjing, CN;

Inventors:

Shen Xu, Nanjing, CN;

Haiqing Zhang, Nanjing, CN;

Yujie Liu, Nanjing, CN;

Ruizhi Wang, Nanjing, CN;

Yuan Gao, Nanjing, CN;

Yongjia Li, Nanjing, CN;

Weifeng Sun, Nanjing, CN;

Longxing Shi, Nanjing, CN;

Assignee:

SOUTHEAST UNIVERSITY, Nanjing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 1/00 (2006.01); H02M 3/158 (2006.01);
U.S. Cl.
CPC ...
H02M 1/082 (2013.01); H02M 1/0025 (2021.05); H02M 3/1586 (2021.05);
Abstract

A multi-phase high-precision current sharing control method applied to constant on-time control is provided, wherein a current difference between continuously sampled current of each line and mean current is processed by a PI compensation module and a low-pass filter module to obtain on-time regulation data. A high bit of the regulation data controls the value of counter reference Vin an on-time control module, and a low bit controls the length of an enabled delay line in a delay line module. The counter timing control of the on-time control module is combined with the delay line timing control of the delay line module to improve the control precision of a DPWM. The method takes COT control of a Buck converter as a typical application. Compared with a multi-phase COT controller without a current-sharing mechanism, the method can improve the stability and reliability of the system.


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