The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2024
Filed:
Feb. 05, 2022
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Honglin Guo, Dallas, TX (US);
Frank John Sweeney, Rockwall, TX (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/265 (2006.01); H01L 23/00 (2006.01); H01L 29/94 (2006.01); H01L 33/64 (2010.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 23/564 (2013.01); H01L 21/26513 (2013.01); H01L 29/94 (2013.01); H01L 33/645 (2013.01);
Abstract
An integrated circuit includes an SOI substrate having a semiconductor layer over a buried insulator layer. An electronic device has an NWELL region in the semiconductor layer, a dielectric over the NWELL region, and a polysilicon plate over the dielectric. A white space region adjacent the electronic device includes a first P-type region in the semiconductor layer and adjacent the surface. The P-type region has a first sheet resistance and the NWELL region has a second sheet resistance that is greater than the first sheet resistance.